Journal of Advanced Materials in Engineering (Esteghlal)

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Fabrication of an integrated circuit with smaller area, besides reducing the cost of manufacturing, usually causes a reduction in the power dissipation and propagation delay. Using the static CMOS technology to fabricate a circuit that realizes a specific logic function and occupies a minimum space, it must be implemented with continuous diffusion runs. Therefore, at the design stage, an Eulerian path should be found for the logic function. Every discontinuity causes an increase in the area as well as a reduction in the clock rate and performance. The realization of a logic function using the static CMOS technology is done through different methods, most of which are based on the Uehara's method. In this paper, an algorithm is suggested that finds the Eulerian path and allows the implementation of the circuit with continuity in the diffusion region that results in minimum area. In a case where there is no Eulerian path, the possible sub-paths are found. In addition, the algorithm gives information that helps the layout generation. Keywords: VLSI, Uehara's method, Static CMOS, Continous diffusion, Standard cell.

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In this paper the effect of deep cryogenic treatment time on microstructure and tribological behavior of AISI 5120 case hardennig steel is studied. The disk shape samples were carburized at 920 ^◦C for 6 hours and air cooled; after austenitizing, the samples were quenched in oil.Then immediately after quenching and sanding, the sample were kept in liquid nitrogen for 1, 24, 30 and 48 h and then tempered at 200 ^◦C for 2 hours. The wear test was done by ball on disk method using of WC ball at 80 and 110 N load. For characterization of carbides, the etchant solution of CuCl₂ (5 gr)+HCl (100 mL) + ethanol (100 mL) was used. The hardness of samples before and after of tempering was measured by vicers method at 300 N load.. The amount of retained austenite was measured by X Ray Diffraction method. For 1DCT and 24DCT samples it was about 8% and 4%; in the other samples, the retained austenite peal was so decreased that it was not visible. The result showed that the hardness increases by deep cryogenic treatment in all speciments. While wear resistance increases in 1DCT and 24DCT samples, it decreases for 30DCT and 48DCT samples in compare with Conventional heat treatment (CHT) sample in both applied loads, such that , 48DCT sample has the least wear resistance. The cause of increament of hardness is due to reduction in amount of retained austenite as a result of deep cryogenic treatment and decreasing in wear resistance after 24 hour, is due to carbide growth and nonhemogenuse distribution in microstructure and then weakening of matrix. So the 24 hour deep cryogenic treatment was the best optimal for AISI 5120 steel.

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